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Btw...

May's picture

My group (Mobile Package Design) is hiring. If you've got an EE background, it's almost a guaranteed job. It might not be the most interesting/difficult stuff you've ever seen, but in my mind that's a good thing.


Adam's picture

mobile packaging

What is mobile packaging?


May's picture

...

Connecting the die to the motherboard. Basically you run a bunch of simulations to know if the signals will interfere with each other and/or other physical influences that will affect signal integrity.


May's picture

...

I'm working on next generation DDR, but my mentor is working on chipsets/PC packaging. At this point that's about all I know, but I'm posting an edited blurb of what my boss posted to an SI list.
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Hi - we are looking to hire a senior signal / power integrity engineer here for Intel mobile platform design.

This position is based at our Santa Clara, CA site. If interested, please forward your resume to me or apply at the Intel online job site (Req/Posting # 512027, https://jobs.intel.com/jobs/jobs.iccw)

More details below:
Your responsibilities will include but not be limited to:
- Lead platform electrical designs and its associated processor and chipset packages
- Interfacing with die circuits, package layout, and board design engineers.
- Develop predictive models for package and board electrical analysis, and verify design robustness.

Qualifications
You should possess a MSEE or PhD in Electrical Engineering with experience in the following areas:
- Knowledge of package and motherboard high speed electrical design practices.
- Good understanding in electrical circuits, transmission line, & EM fields.
- Competent with 2D and 3D modeling and simulation tools
- familiar with physical layout in Allegro/APD.